#------------------------------------------------------------------------------
#-       Copyright (c) 2015-2017, VeriSilicon Inc. All rights reserved        --
#-         Copyright (c) 2011-2014, Google Inc. All rights reserved.          --
#-                                                                            --
#- This software is confidential and proprietary and may be used only as      --
#-   expressly authorized by VeriSilicon in a written licensing agreement.    --
#-                                                                            --
#-         This entire notice must be reproduced on all copies                --
#-                       and may not be removed.                              --
#-                                                                            --
#-------------------------------------------------------------------------------
#- Redistribution and use in source and binary forms, with or without         --
#- modification, are permitted provided that the following conditions are met:--
#-   * Redistributions of source code must retain the above copyright notice, --
#-       this list of conditions and the following disclaimer.                --
#-   * Redistributions in binary form must reproduce the above copyright      --
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#-       documentation and/or other materials provided with the distribution. --
#-   * Neither the names of Google nor the names of its contributors may be   --
#-       used to endorse or promote products derived from this software       --
#-       without specific prior written permission.                           --
#-------------------------------------------------------------------------------
#- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"--
#- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE  --
#- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE --
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#- POSSIBILITY OF SUCH DAMAGE.                                                --
#-------------------------------------------------------------------------------
#-----------------------------------------------------------------------------*/

SRCS += $(DWL_SRCS)
SRCS += $(COMMON_SRCS)
ifeq (y,$(strip $(USE_MODEL_SIMULATION)))
  SRCS += $(SYS_SRCS)
endif
#HEVC_SRCS += software/test/hevc/dectestbench.c

#OBJS := $(sort $(patsubst %,$(OBJDIR)/%,$(SRCS:.c=.o)))
#HEVC_OBJS := $(sort $(patsubst %,$(OBJDIR)/%,$(HEVC_SRCS:.c=.o)))

#hevcdec: HEVC=1
#hevcdec: env depend $(OBJS) $(HEVC_OBJS)
#	@echo -e "[LINK]\t$(OBJDIR)/$@"
#	@$(CC) $(LDFLAGS) $(OBJS) $(HEVC_OBJS) $(LIBS) -o $(OBJDIR)/$@
#ifeq ($(strip $(STRIP)),y)
#	@echo -e "[STRIP]\t$(OBJDIR)/$@"
#	@strip --strip-all $(OBJDIR)/$@
#endif

